## The prototype of the converter seemed to be working fine, but it could be improved. In this article, I will design the converter from scratch using equations from **Under the Hood of a DC/DC Boost Converter** and the datasheet of the UCC3803 to account for component values and show my understanding.

Before we get started, certain values should be set before we can calculate values. These are listed below

- Switching frequency
`f_{sw} = 40 kHz, t_{sw} = 25 \mu s`

- Maximum current load
`I_{out} = 18 mA`

- Input voltage
`V_{in} = 5 V`

- Output voltage
`V_{out} = 170 V`

- Maximum input current
`I_{in,max} = 3 A`

- Switching IC: UCC3803
- External MOSFET: FDS2672

## Setting the output voltage

Our desired output voltage is 170 V. For this, a resistor divider is used to set the desired output voltage at the feedback pin. This pin is tied to half of VREF, which is 4 V at an input voltage of 5 V. This shows that at the feedback pin, 2 V is needed. In order to get this ratio, we use

`V_{fb} = \frac{R_{bottom}}{R_{top}+R_{bottom}}V_{out}`

and rewrite it to

`\frac{R_{bottom}}{R_{top}+R_{bottom}} = \frac{V_{fb}}{V_{out}}`

.

If we fill in our values, we get a voltage division ratio of 0.01176. For this, we can use a lot of values to get close, however the resistance should be very high to limit losses. For this reason, I chose `R_{top} = 634 k\Omega`

and `R_{bottom} = 7.68 k\Omega`

. Which yields a ratio of 0.01196, setting the output voltage to 167.11 V, which is close enough.

## Inductance, duty cycle and frequency

First, the continuous current mode duty cycle, ` D_{CCM}`

has to be calculated with

`D_{CCM} = 1 - \frac{V_{in}}{V_{out}}.`

For CCM, this was calculated to be around 97%.

The switching frequency is determined by` `

`f_{sw} = \frac{1}{RC}`

Where R is placed between the VREF pin and the RC pin and C is placed from RC to ground. I chose these to be 60.4 kΩ and 430 pF to get a switching frequency of 38.5 kHz.

Then, the inductance for the DCM should be calculated with these values, and in order to operate in this mode, the inductance should be smaller or equal to the CCM inductance. The inductance, `L_{DCM}`

, is calculated as,

`L_{DCM} \leq \frac{V_{in}^2t_{sw}(V_{out}-V_{in})}{2V_{out}^2I_{out}}`

.

With this, the numerical value is calculated to be `L_{DCM} \leq 80 \mu H`

. As this is the maximum and I have an inventory of suitable 33 µH inductors for this case with a maximum current rating of 3 A, this will be the chosen value for calculations. This now replaces the calculated inductance.

Let’s continue on to the duty cycle for DCM, ` D_{DCM} `

, which is defined as:

`D_{DCM} = \frac{1}{V_{in}}\sqrt{\frac{2L_{DCM}(V_{out}-V_{in})I_{out}}{t_{sw}}}`

.

## Overcurrent protection

In the event of overcurrent, the IC should switch the output off as it can be dangerous. For this chosen inductor, a maximum continuous current of 3 A is allowed. This is set as the maximum point. Within the UCC3803, the overcurrent protection kicks in from 0.9 V to 1.1V. It tracks a voltage referenced from the VREF pin to the current sense pin to the source of the MOSFET, which is connected to a sense resistor connected to ground. This gives us the following equation for the voltage on the current sense pin

`V_{sense} = V_{REF} - (V_{REF} - I_{in,max}R_{sense})\frac{R_{top}}{R_{top}+R_{bottom}}`

.

Rewriting for the resistor ratio gives us

`\frac{R_{top}}{R_{top}+R_{bottom}} = \frac{V_{REF}-V_{sense}}{V_{REF}-I_{in,max}R_{sense}}`

.

Filling in 0.1 Ω for the sense resistor and the maximum overcurrent trip voltage of 1 V, the ratio needed is calculated to be 0.8108. Or alternatively, a little bit over 4/5. This can be achieved with `R_{top} = 4.12 k\Omega`

and `R_{bottom} = 1 k\Omega`

which gives a ratio of 0.8047, or a maximum current of 2.719 A. This is a safe value.

## External MOSFET

The FDS2672 is an N-channel MOSFET which gate is connected to the OUT pin of the UCC3803. The source is connected to the sense resistance and the drain is connected to the output of the inductor. To reduce MOSFET turn off losses, a capacitor can be added in parallel from the drain to the source of the FET. For this case, the snubber capacitor can also be connected from drain to ground. Instead of calculating, reusing the value from revision 2 (design which uses the same FET and IC) will prove useful to decrease the losses.

## Enable pin

According to the datasheet of the UCC3803, pulling the COMP pin to ground will disable the power supply. This way we can implement an enable pin. By connecting a low forward voltage(schottky) diode with its anode to the COMP pin and its cathode to a transistor which is naturally biased to be on and connect to ground, we can set it to be off by default.

## Datasheet and layout considerations

The datasheet gives a lot of information regarding layout and design which I will highlight per pin or component.

#### FB

Keep the leads as short as possible from the feedback path to the pin to minimize stray capacitance. Stray capacitances can cause instability.

#### OUT

Keep trace as short as possible to the MOSFET to minimize capacitances and reduce switching noise. Do not lay close to feedback lines.

#### RC

Keep trace from pin to capacitor as short as possible and connect its trace to ground seperately to maximise performance and not introduce return current noise to the timing circuit.

#### REF

Place a 100 nF ceramic capacitor close to this pin to ensure a stable VREF of 4 V. Connect to ground using seperate trace.

#### VCC

Place a ceramic 100 nF bypass capacitor close to the VCC pin to limit noise on the 5V input rail.

#### Input side inductor

Place low ESR ceramic capacitors at the input of the inductor to limit input ripple voltage. Choose X5R or X7R dielectric MLCCs with a capacitance in the order of 100 μF to limit ripple. Also make sure to not route traces close to the inductor as noise is generated from stray magnetic fields.

#### Output capacitors

Choose low ESR MLCCs and place them parallel to eachother each in the order of 1 μF.

#### Diode placement

The diode placement in revision 2 was not in the path of the transistor, leading to losses in generating the high voltage. To counter this, the diode should be placed directly in the path from the output of the inductor to the drain of the MOSFET to increase efficiency.

#### Band stop filter

As seen in the analysis of revision 2, under load, there were 5 V peaks visible. I want these to be filtered out. For this, a low pass filter or band stop filter can be placed behind the diode to let the spikes disappear.

## Leave a Reply